Selective reed-solomon error correction decoders in digital communication systems

摘要

A decoder of a data signal subjected to phase shifting keying (PSK) modulation uses an inner decoder for short block codes within a phase locked loop which is adapted to process the data signal with multiple initial phase/frequency error estimates and to output sets of codewords and phase/frequency error estimates respectively corresponding to the initial phase/frequency estimates. A selection circuit (720) selects and forwards the output corresponding to one of the multiple phase/frequency estimates. An outer Reed-Solomon block decoder corrects errors in the codewords from the set of associated codewords selected by the selection circuit. The Reed-Solomon block decoder corrects a combination of random errors and erasure errors where the erasure errors are chosen based on reliability metrics generated by the inner code or else the first positions of the data bursts are chosen for erasures as these are most likely to be in error relative to other positions.