Limiting the valve of a 64-bit number to a maximum value, a minimum value, or both in a 32-bit environment

摘要

In one embodiment of the present invention, logic for limiting the value of a 64-bit number to a maximum limit in a 32-bit environment allocates one or more bit flags in a first operation. The logic accesses a most significant 32-bit portion of a first 64-bit number including a first value. The logic accesses a most significant 32-bit portion of a second 64-bit number including a maximum limit and a second value. The logic compares the first value with the second value and, if the first value is greater than the second value, sets the bit flags accordingly and changes the most significant 32-bit portion of the first 64-bit number to match the same of the second 64-bit number. If the first value is equal to the second value, the logic sets the one or more allocated bit flags accordingly. In a second operation following the first operation, the logic accesses the bit flags. If the bit flags indicate that the first value is greater than the second value, the logic accesses a least significant 32-bit portion of the first 64-bit number, accesses a least significant 32-bit portion of the second 64-bit number, and changes the least significant 32-bit portion of the first 64-bit number to match the same of the second 64-bit number. If the bit flags indicate that the first value is equal to the second value, the logic accesses the least significant 32-bit portion of the first 64-bit number including a third value. The logic accesses a least significant 32-bit portion of the second 64-bit number including a fourth value. The logic compares the third value with the fourth value and, if the third value is greater than the fourth value, changes the least significant 32-bit portion of the first 64-bit number to match the same of the second 64-bit number.