首页> 外国专利> Designing integrated circuits to reduce electromigration effects

Designing integrated circuits to reduce electromigration effects

机译:设计集成电路以减少电迁移效应

摘要

A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one metal lead. The method can assume the metal leads are arranged in series only. The method can calculate the reliability of the integrated circuit. The method can arrange the set of metal leads by reliability. The method can divide the set of metal leads into at least two subsets, a subset requiring redesign and a subset meeting the reliability criteria. An embodiment includes an integrated circuit designed by the method taught. An embodiment includes a computer program product according to the method taught. An embodiment includes an integrated circuit including an integrated circuit designed according to the computer program product.
机译:一种设计集成电路的方法可以计算每个金属引线中的电流密度。该方法可以计算至少一根金属铅的平均失效时间。该方法可以假定金属引线仅串联排列。该方法可以计算集成电路的可靠性。该方法可以通过可靠性来布置金属引线组。该方法可以将金属引线的集合分成至少两个子集,一个子集需要重新设计,一个子集满足可靠性标准。一个实施例包括通过所教导的方法设计的集成电路。一个实施例包括根据所教导的方法的计算机程序产品。一个实施例包括集成电路,该集成电路包括根据计算机程序产品设计的集成电路。

著录项

  • 公开/公告号US2003066036A1

    专利类型

  • 公开/公告日2003-04-03

    原文格式PDF

  • 申请/专利权人 MAU HENDRIK T.;

    申请/专利号US20010949068

  • 发明设计人 HENDRIK T. MAU;

    申请日2001-09-07

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-22 00:08:42

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号