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Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode
Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode
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机译:具有执行多个线程的多个微引擎的并行多线程处理器,每个微引擎具有可加载的微代码
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摘要
A parallel hardware-based multithreaded processor is described. The processor includes a general purpose processor that coordinates system functions and a plurality of microengines that support multiple hardware threads. The processor also includes a memory control system that has a first memory controller that sorts memory references based on whether the memory references are directed to an even bank or an odd bank of memory and a second memory controller that optimizes memory references based upon whether the memory references are read references or write references.
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