Integrated approach for controlling top dielectric loss during spacer etching

摘要

A process for forming a composite insulator spacer on the sides of a MOSFET gate structure, has been developed. The process features formation of additional insulator spacer shapes on top portions of sides of a gate structure in which an initial insulator spacer had been removed during an over etch cycle used for definition of the initial insulator spacer. The re-establishment of insulator spacer shapes provides a composite insulator spacer offering reduced risk of gate to substrate leakage or shorts, that can occur during a subsequent salicide procedure from the presence of metal silicide stringers or ribbons formed on, and residing on the composite insulator spacer.