首页> 外国专利> Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same

Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same

机译:具有表面击穿保护的低压穿通双向瞬态电压抑制装置及其制造方法

摘要

A bi-directional transient voltage suppression device is provided. The device comprises: (a) a lower semiconductor layer of p-type conductivity; (b) an upper semiconductor layer of p-type conductivity; (c) a middle semiconductor layer of n-type conductivity adjacent to and disposed between the lower and upper layers such that lower and upper p-n junctions are formed; (d) a mesa trench extending through the upper layer, through the middle layer and through at least a portion of the lower layer, such that the mesa trench defines an active area for the device; and (e) an oxide layer covering at least portions of the walls of the mesa trench that correspond to the upper and lower junctions, such that the distance between the upper and lower junctions is increased at the walls. The integral of the net middle layer doping concentration of this device, when taken over the distance between the junctions, is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown. A method of making such a device is also provided, which comprises: (a) providing a p-type semiconductor substrate; (b) epitaxially depositing a lower semiconductor layer of p-type conductivity; (c) epitaxially depositing a middle semiconductor layer of n-type conductivity over the lower layer; (d) epitaxially depositing an upper semiconductor layer of p-type conductivity over the middle layer; (e) heating the substrate, the lower epitaxial layer, the middle epitaxial layer and the upper epitaxial layer; (f) etching a mesa trench that extends through the upper layer, through the middle layer and through at least a portion of the lower layer, such that the mesa trench defines an active area for the device; and (g) thermally growing an oxide layer on at least those portions of the walls of the mesa trench that correspond to the upper and lower junctions of the device.
机译:提供了一种双向瞬态电压抑制装置。该器件包括:(a)具有p型导电性的下部半导体层; (b)具有p型导电性的上半导体层; (c)与下层和上层相邻并设置在下层和上层之间的具有n型导电性的中间半导体层,从而形成下层p-n结和上层p-n结; (d)台面沟槽延伸通过上层,中间层和下层的至少一部分,以使台面沟槽限定器件的有源区; (e)氧化层,其覆盖台面沟槽的壁的至少与上,下连接点相对应的部分,使得上,下连接点之间的距离在壁处增加。当考虑结之间的距离时,该器件的净中间层掺杂浓度的积分使得击穿发生时是击穿击穿,而不是雪崩击穿。还提供了一种制造这种器件的方法,该方法包括:(a)提供p型半导体衬底; (b)外延沉积p型导电性的下部半导体层; (c)在下层上外延沉积n型导电的中间半导体层; (d)在中间层上外延沉积p型导电性的上半导体层; (e)加热衬底,下外延层,中间外延层和上外延层; (f)蚀刻延伸通过上层,中间层和至少下层的至少一部分的台面沟槽,以使台面沟槽限定器件的有源区; (g)在台面沟槽的壁的至少与器件的上部和下部结相对应的那些部分上热生长氧化物层。

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