Method for obtaining DC convergence for SOI FET models in a circuit simulation program

摘要

A process for obtaining accurate DC convergence in a DC phase of a circuit simulation program for models of field effect transistors (FETs) on a silicon-on-insulator (SOI) substrate. The process comprises running iterations of the DC phase of the circuit simulation program such that error criteria are satisfied, wherein the pseudo-time step changes at each iteration until it reaches a value such that a desired current value is achieved. DC convergence is also achieved by reducing the magnitude of the capacitive and/or charge elements connected to the floating body regions of the field effect transistors on the silicon-on-insulator substrate model during the DC phase to achieve a desired current value.