Method for achieving high self-aligning vertical gate studs relative to the support isolation level

摘要

A vertical gate transistor has a gate stud (14) that extends above the substrate (20) surface in order to contact a word line. The stud is formed of a first material (26) and a second material (28) having differently selective etch characteristics. The second material (18) is formed within a recess in the first material (26), and the first material (26) is then selectively etched back substantially, with the second material remaining and extending above the surrounding substrate. The gate stud (14) can then accommodate a thick array top oxide (34) and subsequent chemical mechanical polish and perform in a wide process window.