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Device modeling and characterization structure with multiplexed pads
Device modeling and characterization structure with multiplexed pads
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机译:具有多路复用焊盘的器件建模和表征结构
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摘要
A multiplexed transistor characterization and modeling structure for testing a plurality of transistors, The characterization and modeling structure comprises a common substrate pad, a common source pad, a plurality of drain pads, and a plurality of gate pads. The characterization and modeling structure further comprises a plurality of individual transistors. Each individual transistor comprises a substrate connected to the common substrate pad, a source connected to the common source pad, a drain connected to a single drain pad, and a gate connected to a single gate pad, wherein each individual transistor is connected to a different drain pad and gate pad combination.
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