METHOD AND APPARATUS FOR MODELING AND SIMULATING THE EFFECTS OF BRIDGE DEFECTS IN INTEGRATED CIRCUITS

摘要

A bridge fault modeling and simulation apparatus including a neuralnetwork simulates the effects of bridge defects in complementary metal oxidesemiconductor integrated circuits. The apparatus includes a multilayerfeedforward neural network (MLFN), implemented within the framework of avery high speed integrated circuit hardware description language (VHDL)saboteur. The saboteur is placed between logic cells in the IC simulation. Theapparatus computes exact bridged node voltages and propagation delay timeswith due attention to surrounding circuit elements. It results in fastersimulation and achieves excellent accuracy.