HIERARCHICAL MULTIPLEXER-BASED INTEGRATED CIRCUIT INTERCONNECT ARCHITECTURE FOR SCALABILITY AND AUTOMATIC GENERATION

摘要

This invention consists of a hierarchical multiplexer-based interconnectarchitecture (Fig.2) and is applicable to Field Programmable Gate Arrays,multi-processors, and other applications that require configurableinterconnect networks. In place of traditional pass transistors (15) or gates,multiplexers (23) are used and the interconnect architecture is based uponhiearchical interconnection units (25). Bounded and predictable routingdelays, compact configuration memory requirements, non-destructive operationin noisy environments, uniform building blocks and connections for automaticgeneration, scalability to thousands of interconnected elements, and highroutability even under high resource utilization are obtained.