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METHOD OF DICING A COMPLEX TOPOLOGICALLY STRUCTURED WAFER
METHOD OF DICING A COMPLEX TOPOLOGICALLY STRUCTURED WAFER
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机译:切割复杂的拓扑结构晶圆的方法
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摘要
In the present invention, the boundary of the or each chip on a wafer is defined by the absence of metallization and the presence of a continuous etched trench. The metallization, comprising the deposition of a metal layer, is not formed monolithically on the wafer, but is patterned to cover only the surface of the or each chip, thereby providing for electrical contact to the chip. The metal layer so deposited, contributes to the structural integrity and mechanical strength of the chip, but does not form a mechanical link between neighbouring chips. The trenches are etched to a depth that is substantially below the surface topology of the wafer. In particular, the trenches are etched to a depth that is substantially below layers in the wafer that contribute to the operation of devices fabricated on the wafer. Typically this would mean at least 3µm into the wafer substrate below the active regions grown on the substrate.
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