Multiplier-based processor-in-memory architectures for image and graphics processing

摘要

A Procesor-In-Memory (PIM) (100) includes a digital accelerator for image and graphics processing. The digital accelerator is based on an ALU having multipliers (108) for processing combinations of bits smaller than those in the input data (e.g., 4x4 adders if the input data are 8-bit numbers). The ALU implements various arithmetic algorithms for addition, multiplication, and other operations. A secondary processing logic includes adders (104) in series and parallel to permit vector operations as well as operations on longer scalars. A self-repairing is also disclosed.