A network gateway processor architecture including a scalable array of compute processors functions to convert inbound data packets to outbound data packets. An ingress processor, coupleable to a first network, receives inbound data packets and is coupled to provide the inbound data packets to the compute processors. An egress processor, coupleable to a second network, is coupled to the compute processors to collect and forward outbound data packets to the second network. The ingress processor distributes inbound data packets to the compute processors based on a least load value selected from current load values determined for respective compute processors of the scalable array. The current load values represent estimated processing completion times for the respective compute processors of the scalable array. Preferably, the current load values are dynamically derived with respect to the size of the inbound data packets and the performance of the respective compute processors.
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