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Semiconductor integrated circuit including intellectural property core testing means using boundary scan and intellectural property core testing method thereof
Semiconductor integrated circuit including intellectural property core testing means using boundary scan and intellectural property core testing method thereof
PURPOSE: A semiconductor integrated circuit comprising an IP(Intellectual Property) core block testing unit using boundary scan and an IP core testing method are provided, which tests an IP core block efficiently without increasing the number of output ports. CONSTITUTION: An IP(Intellectual Property) core block(21) is designed in advance to perform a function. A plurality of peripheral circuit blocks(22,23,24) are connected to the IP core block respectively, and receive test data applied from the external and then provide them to a test data input port(TI1) of the above IP core. And a boundary scan controller(25) is connected to the IP core block, and connects the test data input port of the IP core block and a test data output port(T0) of the IP core block in response to a command applied from the external through a boundary scan port.
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