首页> 外国专利> Semiconductor integrated circuit including intellectural property core testing means using boundary scan and intellectural property core testing method thereof

Semiconductor integrated circuit including intellectural property core testing means using boundary scan and intellectural property core testing method thereof

机译:包括使用边界扫描的知识产权核心测试装置的半导体集成电路及其知识产权核心测试方法

摘要

PURPOSE: A semiconductor integrated circuit comprising an IP(Intellectual Property) core block testing unit using boundary scan and an IP core testing method are provided, which tests an IP core block efficiently without increasing the number of output ports. CONSTITUTION: An IP(Intellectual Property) core block(21) is designed in advance to perform a function. A plurality of peripheral circuit blocks(22,23,24) are connected to the IP core block respectively, and receive test data applied from the external and then provide them to a test data input port(TI1) of the above IP core. And a boundary scan controller(25) is connected to the IP core block, and connects the test data input port of the IP core block and a test data output port(T0) of the IP core block in response to a command applied from the external through a boundary scan port.
机译:目的:提供一种半导体集成电路,其包括使用边界扫描的IP(知识产权)核心块测试单元和IP核心测试方法,其可以在不增加输出端口数量的情况下有效地测试IP核心块。构成:预先设计了一个IP(知识产权)核心模块(21)以执行功能。多个外围电路块(22、23、24)分别连接到IP核心块,并接收从外部施加的测试数据,然后将它们提供给上述IP核心的测试数据输入端口(TI1)。并且边界扫描控制器(25)连接到IP核心块,并响应于来自IP核心块的命令而连接IP核心块的测试数据输入端口和IP核心块的测试数据输出端口(T0)。外部通过边界扫描端口。

著录项

  • 公开/公告号KR20030055999A

    专利类型

  • 公开/公告日2003-07-04

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20010086150

  • 发明设计人 KIM GYU DONG;

    申请日2001-12-27

  • 分类号G01R31/28;

  • 国家 KR

  • 入库时间 2022-08-21 23:46:44

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