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Split - gate - flash - memory element, arrangement of the split - gate - flash - memory elements and method for erasing the same
Split - gate - flash - memory element, arrangement of the split - gate - flash - memory elements and method for erasing the same
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机译:分离式栅极闪存元件,分离式栅极闪存元件的布置及其擦除方法
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摘要
The arrangement has a memory element in a p-trough (1) whose diffusion depth is shallow in comparison to an n-trough (2) and that is arranged in the n-trough so that it has no electrical contact with the substrate (3) at any point. The deep n-trough is arranged in a p-substrate and the n+-source and drain connections (6,7) are arranged so that they have no electrical contact with the deep n-trough or substrate at any point. Independent claims are also included for the following: a method of clearing a split gate flash memory element arrangement.
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