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NAND type EEPROM includes high voltage ramp circuit which controls rising slope of program voltage generated in voltage pump circuit for write operation of memory cell transistor
NAND type EEPROM includes high voltage ramp circuit which controls rising slope of program voltage generated in voltage pump circuit for write operation of memory cell transistor
The EEPROM includes a select line driver (300) which supplies select voltage limited below a power supply voltage, to string select line (SSL) and program voltage to word line (WL). A voltage ramp circuit (400) controls the rising slope of program voltage generated in voltage pump circuit (200) for write operation of memory cell transistor, so that capacitive coupling does not exist between string select line and word line. An Independent claim is also included for method for programming non-volatile integrated circuit memory device.
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