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Circuit arrangement for analog to digital conversion of a time continuous input signal uses comparators to compare with a reference and a logic device

机译:用于时间连续输入信号的模数转换的电路装置,使用比较器与基准和逻辑器件进行比较

摘要

A circuit for A/D conversion of a continuous input signal which may have interference uses comparators (20-27) to compare with a reference and a logic device (110) for digital conversion. A device (100) detects the time separation between two directly following sides of signals and amplifies this if less than a minimum. A circuit for A/D conversion of a continuous input signal which may have interference has many comparators (20-27) to compare it to a reference and a logic device (110) to convert their output into a multiplace digital word. A device (100) next to the comparators detects the time separation between two directly following sides of two digital output signals and amplifies this by an adjustable amount if it is less than a minimum value.
机译:用于可能具有干扰的连续输入信号的A / D转换的电路使用比较器(20-27)与参考和逻辑器件(110)进行比较以进行数字转换。设备(100)检测信号的两个直接跟随的侧面之间的时间间隔,并且如果小于最小值,则将该时间间隔放大。用于可能具有干扰的连续输入信号的A / D转换的电路具有许多比较器(20-27)以将其与基准进行比较,以及逻辑器件(110)以将其输出转换成多位数字字。在比较器旁边的设备(100)检测两个数字输出信号的两个紧随其后的边之间的时间间隔,如果该时间间隔小于最小值,则将该时间间隔放大一个可调整的量。

著录项

  • 公开/公告号DE20120385U1

    专利类型

  • 公开/公告日2003-05-28

    原文格式PDF

  • 申请/专利权人 IC-HAUS GMBH;

    申请/专利号DE2001220385U

  • 发明设计人

    申请日2001-12-17

  • 分类号H03M1/12;

  • 国家 DE

  • 入库时间 2022-08-21 23:41:40

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