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PROCEDURES AND PREPARATION FOR THE DETECTION AND ADMINISTRATION OF BUDGET TRANSFER INSTRUCTIONS IN AN IEEE1394 SERIOUS BUDGET NOTE

机译:检测和管理IEEE1394严重预算注释中预算转移指令的程序和准备

摘要

A node on a bus structure includes a physical interface to the bus structure. The physical interface determines the port on which an inbound bus packet is received and transmits an outbound bus packet only to an appropriate port connected to the destination node. When receiving a bus packet, the physical interface determines if the port on which the packet was received is a secure port. If it is determined that the packet was received on a secure port, the packet is then dumped to a direct memory access channel where the packet is processed as usual without requiring processor intervention. If the packet was received on an unsecure port, the packet is dumped to a general receive area and the processor is interrupted. The processor then examines the packet to determine whether the packet can be processed without affecting the security of the node. When transmitting a bus packet, the port to which the destination node of the bus packet is connected is determined. The bus packet is then only transmitted on this destination port while the other ports within the physical interface circuit are held busy. IMAGE
机译:总线结构上的节点包括与总线结构的物理接口。物理接口确定在其上接收入站总线分组的端口,并且仅将出站总线分组发送到连接到目标节点的适当端口。当接收到总线数据包时,物理接口确定接收数据包的端口是否为安全端口。如果确定在安全端口上接收到该数据包,则将该数据包转储到直接内存访问通道,在该通道中照常处理该数据包而无需处理器干预。如果在不安全的端口上接收到该数据包,则该数据包将被转储到常规接收区域,并且处理器将被中断。然后,处理器检查数据包以确定是否可以处理该数据包而不影响节点的安全性。当发送总线分组时,确定总线分组的目的节点所连接的端口。然后,仅在物理接口电路中的其他端口处于繁忙状态时,才在此目标端口上发送总线数据包。 <图像>

著录项

  • 公开/公告号DE69810337D1

    专利类型

  • 公开/公告日2003-01-30

    原文格式PDF

  • 申请/专利权人 SONY ELECTRONICS INC. PARK RIDGE;

    申请/专利号DE19986010337T

  • 发明设计人 SMYERS SCOTT;

    申请日1998-10-19

  • 分类号G06F13/38;

  • 国家 DE

  • 入库时间 2022-08-21 23:38:50

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