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Cache memory failure processing apparatus, cache memory failure processing method, and multiprocessor system

机译:高速缓冲存储器故障处理装置,高速缓冲存储器故障处理方法和多处理器系统

摘要

PROBLEM TO BE SOLVED: To restore updated data even when the data stored in a cache memory cannot be written back due to a fault in the cache memory in a store-in system. SOLUTION: An updated address holding part 3 is constituted of a main storage address register 20 to hold a main storage address, updated address storage mechanism 21 consisting of plural updated address storage entries 211 to store the contents of the main storage address register 20, address comparison mechanism 22 to compare a value of the main storage address register 20 with a value of the updated address storage mechanism 21 and updated address storage control mechanism 23. An address is registered in the updated address storage mechanism 21 by writing data, the address is deleted by writing the updated data in a main storage 8, other cache memory 4 is searched by the address in the updated address storage mechanism 21 when the fault occurs and the updated data is restored by writing the data held by the same address in the main storage 8.
机译:解决的问题:即使由于存储系统中的高速缓存中的故障而无法将存储在高速缓存中的数据写回,也要还原更新的数据。解决方案:更新地址保存部分3由用于保存主存储地址的主存储地址寄存器20,由多个更新地址存储条目211组成的用于存储主存储地址寄存器20内容的更新地址存储机制21,地址组成。比较机构22,用于将主存储地址寄存器20的值与更新地址存储机构21和更新地址存储控制机构23的值进行比较。通过写入数据将地址注册在更新地址存储机构21中。当发生故障时,通过将更新的数据写入主存储器8而删除,通过在更新的地址存储机构21中的地址来搜索其他高速缓冲存储器4,并且通过将相同地址所保持的数据写入主存储器中来恢复更新的数据。储存8。

著录项

  • 公开/公告号JP3555847B2

    专利类型

  • 公开/公告日2004-08-18

    原文格式PDF

  • 申请/专利权人 NECソフト株式会社;

    申请/专利号JP19990146877

  • 发明设计人 炭屋 紀彦;

    申请日1999-05-26

  • 分类号G06F12/08;

  • 国家 JP

  • 入库时间 2022-08-21 23:26:35

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