首页> 外国专利> 32-BIT GENERAL-PURPOSE ASYNCHRONOUS BUS INTERFACE USING READING AND WRITING STROBE BYTE ENABLE

32-BIT GENERAL-PURPOSE ASYNCHRONOUS BUS INTERFACE USING READING AND WRITING STROBE BYTE ENABLE

机译:通过读取和写入选通字节启用使能32位通用总线接口

摘要

PROBLEM TO BE SOLVED: To provide a display controller having a 32-bit general purpose asynchronous bus interface using a reading and writing strobe byte enable.;SOLUTION: The display controller constituted to communicate with an asynchronous bus interface microprocessor operates at a first clock rate and the microprocessor operates at a second clock rate. The display controller has a memory core for holding the displayed image data and a register set holding the configuration data enabling display of the image data. It also has an asynchronous bus interface enabling communication between the memory core of the display controller and the microprocessor with a bus. The asynchronous bus interface is constituted not to be influenced either by the second clock rate of the microprocessor or by the difference between the first clock rate and the second clock rate.;COPYRIGHT: (C)2004,JPO
机译:解决的问题:提供一种具有读和写选通字节使能的具有32位通用异步总线接口的显示控制器;解决方案:被构造为与异步总线接口微处理器通信的显示控制器以第一时钟速率工作微处理器以第二时钟速率运行。显示控制器具有用于保存所显示的图像数据的存储器核和用于保存能够显示图像数据的配置数据的寄存器组。它还具有异步总线接口,该接口使显示控制器的存储核心与带有总线的微处理器之间能够进行通信。异步总线接口的构成不受微处理器的第二时钟速率或第一时钟速率和第二时钟速率之间的差异的影响。;版权:(C)2004,JPO

著录项

  • 公开/公告号JP2004005683A

    专利类型

  • 公开/公告日2004-01-08

    原文格式PDF

  • 申请/专利权人 SEIKO EPSON CORP;

    申请/专利号JP20030146902

  • 发明设计人 VAN DYKE PHIL;SINGH RAI BARINDER;

    申请日2003-05-23

  • 分类号G06F13/42;G06F3/153;

  • 国家 JP

  • 入库时间 2022-08-21 23:23:56

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