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Semiconductor equipment and the arithmetic operation system, the image processing system, the aural signal treatment system, the pattern recognition system, the signal processing system, the parallel computer system and the video signal processing system null which use
Semiconductor equipment and the arithmetic operation system, the image processing system, the aural signal treatment system, the pattern recognition system, the signal processing system, the parallel computer system and the video signal processing system null which use
PROBLEM TO BE SOLVED: To constitute a large-scale highly parallel system, having operation elements coupled closely with one another, in one chip by using a device which has a floating node. ;SOLUTION: Capacity means 8-13 are connected to input terminals 16-21 respectively. The common connection part between the uninverted input terminal 6 of a high-input-impedance operational amplifier 1 and capacity means 8-11, and the contact of the common connection part between the inverted input terminal 7 and capacity means 12-15 are floating nodes respectively. This arithmetic circuit comes into a signal operation mode wherein the signal from a precedent-stage operational amplifier 23 is received and processed when a reset signal 5 is negative. The gain setting of the operational amplifier 1 is determined by the capacity ratio of a capacity means 15 for negative feedback, and a grounded capacity means 14 and capacity means 8-13. By changing the capacity ratio, multi-valued linear operation is made possible.;COPYRIGHT: (C)1997,JPO
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