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Cache memory system, a cache memory, an updating method for the cache memory and for the cache memory system, and an updating program for the cache memory system
Cache memory system, a cache memory, an updating method for the cache memory and for the cache memory system, and an updating program for the cache memory system
A cache memory system includes a cache memory having a plurality of entries. Each entry configured to include each of information storage units fetching and storing part of information stored in a main memory. Each of reference bit storage units stores a use status for a certain period of information stored in the corresponding information storage unit. A hit detection circuit is connected to the information storage units. The hit detection circuit generates a hit signal to each of the reference bit storage units.
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