首页> 外国专利> System, method and apparatus for conserving power consumed by a system having a processor integrated circuit

System, method and apparatus for conserving power consumed by a system having a processor integrated circuit

机译:用于节省具有处理器集成电路的系统所消耗的功率的系统,方法和装置

摘要

A processor integrated circuit has at least one processor and two or more levels of cache memory. A first power connection provides power to the processor and lower level cache, which form a first power domain. The integrated circuit has a second power connection providing power to upper level cache of the circuit, forming a second power domain. There may be additional power connections to the integrated circuit, forming additional power domains, such as periphery or memory-interface power.
机译:处理器集成电路具有至少一个处理器和两级或更多级高速缓存。第一电源连接为形成第一电源域的处理器和较低级别的缓存提供电源。集成电路具有第二电源连接,该第二电源连接向电路的上层高速缓存提供电源,从而形成第二电源域。可能有到集成电路的其他电源连接,形成了其他电源域,例如外围设备或存储器接口电源。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号