首页> 外国专利> Method of forming a bitline and a bitline contact, and dynamic memory cell including a bitline and bitline made contact according to the method

Method of forming a bitline and a bitline contact, and dynamic memory cell including a bitline and bitline made contact according to the method

机译:形成位线和位线接触的方法,以及根据该方法的包括位线和位线接触的动态存储单元

摘要

A method of forming a bitline and a bitline contact and a dynamic random access memory (DRAM) cell array includes the following steps. The bitline and the bitline contact are formed in a two-step process, in which, first, the bitline contact is formed in a first dielectric layer and, then, the bitline of a conductive material having a lower resistivity than the bitline contact material is defined in a second dielectric layer (5). According to a preferred embodiment, the second dielectric layer (5) is made of a low k dielectric. The retention anneal process, which is usually performed in the standard DRAM process, is preferably made before depositing the bitline material and, optionally, the low k dielectric. A dynamic random access memory cell array having at least one bitline and a bitline contact can be manufactured by this method.
机译:形成位线和位线接触的方法以及动态随机存取存储器(DRAM)单元阵列包括以下步骤。通过两步工艺形成位线和位线接触,其中,首先,在第一介电层中形成位线接触,然后,电阻率比位线接触材料低的导电材料的位线被形成。在第二介电层( 5 )中定义。根据优选实施例,第二电介质层( 5 )由低k电介质制成。通常在标准DRAM工艺中执行的保持退火工艺优选在沉积位线材料以及可选的低k电介质之前进行。可以通过这种方法来制造具有至少一个位线和位线接触的动态随机存取存储单元阵列。

著录项

  • 公开/公告号US6750112B2

    专利类型

  • 公开/公告日2004-06-15

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号US20020178641

  • 发明设计人 ALBRECHT KIESLICH;

    申请日2002-06-24

  • 分类号H01L212/00;

  • 国家 US

  • 入库时间 2022-08-21 23:18:45

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