首页> 外国专利> AUTOMATED DESIGN RULE VIOLATION CORRECTION WHEN ADDING DUMMY GEOMETRIES TO A DESIGN LAYOUT

AUTOMATED DESIGN RULE VIOLATION CORRECTION WHEN ADDING DUMMY GEOMETRIES TO A DESIGN LAYOUT

机译:将虚拟几何添加到设计版面时自动纠正设计规则

摘要

Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. Adding non-design geometries to a design layout is accomplished by adding one or more non-design geometries to the design layout, the design layout including one or more design geometries; and correcting one or more design rule violations by removing a portion of the one or more non-design geometries; wherein correcting the one or more design rule violations includes: deriving non-design wide class objects from the one or more non-design geometries and design wide class objects from the one or more design geometries; wherein at least one of the non-design wide class objects and the design wide class objects have a virtual edge; and using the virtual edge in determining the portion of the one or more non-design geometries to be removed.
机译:使用自动化技术来校正关于非设计几何形状的某些规则违反,从而简化和自动化电子电路的设计布局,无论其体现为设计编码还是制成的电子电路。通过将一个或多个非设计几何形状添加到设计布局中,可以将非设计几何形状添加到设计布局中,该设计布局包括一个或多个设计几何形状;并通过移除一个或多个非设计几何的一部分来纠正一个或多个设计规则违规;其中,纠正一个或多个设计规则冲突包括:从一个或多个非设计几何导出非设计宽类对象,并从一个或多个设计几何导出设计宽类对象;其中,非设计范围分类对象和设计范围分类对象中的至少一个具有虚拟边缘;使用虚拟边缘确定要去除的一个或多个非设计几何的一部分。

著录项

  • 公开/公告号US2004019861A1

    专利类型

  • 公开/公告日2004-01-29

    原文格式PDF

  • 申请/专利权人 SUN MICROSYSTEMS INC.;

    申请/专利号US20020201102

  • 发明设计人 MU-JING LI;

    申请日2002-07-23

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 23:16:33

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