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Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer of signal groups in a digital signal processing unit
Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer of signal groups in a digital signal processing unit
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机译:用于在空闲模式下激活数字信号处理器以在数字信号处理单元中进行信号组的处理器间传输的设备和方法
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摘要
In a digital processing unit having a plurality of digital signal processors, a first digital signal processor can request a direct transfer of a signal group stored in the memory unit of a second digital signal processor. In order to insure that the second digital signal is active, a control signal is generated by the direct memory access controller of the first digital signal processor. The control signal is applied the directly to the memory access controller of the second digital signal processor. When the second digital signal processor is in an IDLE mode, the control signal activates the second digital signal processor.
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