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Read only data bus and write only data bus forming in different layer metals

机译:只读数据总线和只写在不同层金属中形成的数据总线

摘要

A semiconductor memory device that enables data buses to operate at high speed by reducing wiring capacitance and interference noise between data bus lines is provided. A semiconductor memory device includes a read-only data bus which is formed in a first metal layer and has plural pairs of read lines precharged to an arbitrary voltage and two lines in a pair transmitting complementary read signals. A write-only data bus, which is positioned in parallel with the read-only data bus, is formed in a second metal layer different from the first metal layer and has plural pairs of write lines precharged to an arbitrary voltage, and two lines in a pair transmitting complementary write signals.
机译:提供了一种半导体存储装置,该半导体存储装置通过减小布线电容和数据总线之间的干扰噪声而使数据总线能够高速运行。半导体存储装置包括:只读数据总线,其形成在第一金属层中,并且具有多对被预充电至任意电压的读取线;以及成对的两条传输互补读取信号的线。与只读数据总线平行放置的只读数据总线形成在不同于第一金属层的第二金属层中,并且具有预充电到任意电压的多对写线,以及一对传输互补写信号。

著录项

  • 公开/公告号US6744657B2

    专利类型

  • 公开/公告日2004-06-01

    原文格式PDF

  • 申请/专利权人 MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD.;

    申请/专利号US20020245012

  • 发明设计人 MASASHI AGATA;

    申请日2002-09-16

  • 分类号G11C50/60;

  • 国家 US

  • 入库时间 2022-08-21 23:15:33

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