Memory device e.g. dynamic RAM, for memory system of computer, has data buses to transfer read and write data between interface and data storage arrays during overlap time period of data transfer on the buses

摘要

The memory device has data buses coupled between an interface (1001) and data storage arrays (0-3) to transfer read and write data from interface to storage arrays and vice versa. The read and write data are transferred with respect to reception of READ and WRITE commands at the interface, during an overlap time period between data transfer on the buses. An independent claim is also included for a method of operating a memory system with a master device coupled to a slave memory.