首页> 外国专利> Method and system for low power, low jitter, wide range, self-adaptive multi-frequency phase locked loop

Method and system for low power, low jitter, wide range, self-adaptive multi-frequency phase locked loop

机译:低功耗,低抖动,宽范围,自适应多频锁相环的方法和系统

摘要

A self-adaptive method for controlling a self-biased PLL system is disclosed. The method comprises providing an application-dependent input frequency; and providing an application-dependent number N representing the ratio between the output frequency and the application-dependent input frequency to the PLL system. In a system and method in accordance with the present invention, the bandwidth and damping factor are tracked, not only with the input frequency but with the divider ratio as well. Therefore, jitter is minimized for any operating condition (i.e., input frequency variations N). The charge-pump current is made to be proportional to the VCO current ID and inversely proportional to the frequency range N; and the loop filter resistor is made to be inversely proportional to the square root of the VCO current ID and proportional to N. In so doing, the bandwidth and damping factors can be tracked more comprehensively.
机译:公开了一种用于控制自偏置PLL系统的自适应方法。该方法包括提供取决于应用的输入频率;以及并且,将表示输出频率和与应用相关的输入频率之比的与应用相关的数字N提供给PLL系统。在根据本发明的系统和方法中,不仅利用输入频率而且利用分频比来跟踪带宽和阻尼因数。因此,对于任何工作条件(即,输入频率变化N),抖动被最小化。电荷泵电流与VCO电流I D 成正比,与频率范围N成反比;并且使环路滤波器电阻与VCO电流I D 的平方根成反比,与N成正比。这样,可以更全面地跟踪带宽和阻尼因数。

著录项

  • 公开/公告号US6693496B1

    专利类型

  • 公开/公告日2004-02-17

    原文格式PDF

  • 申请/专利权人 GENESIS MICROCHIP INC.;

    申请/专利号US20020098758

  • 发明设计人 NICOLAS LEBOULEUX;

    申请日2002-03-13

  • 分类号H03B10/00;H03L70/00;

  • 国家 US

  • 入库时间 2022-08-21 23:14:12

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