首页> 外国专利> SAMPLING CLOCK ERROR DETECTING APPARATUS AND METHOD, AND ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING (OFDM) RECEIVER INCLUDING THE SAME

SAMPLING CLOCK ERROR DETECTING APPARATUS AND METHOD, AND ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING (OFDM) RECEIVER INCLUDING THE SAME

机译:采样时钟误差检测装置和方法,以及包括相同频率的正交频分复用(OFDM)接收器

摘要

A clock error detection apparatus and method for an OFDM receiver stably establishes a sampling clock recovery operation without being affected by a channel. The clock error detection apparatus extracts a pilot symbol from an output signal of the FFT unit, removes reception symbol's phase distortion caused by a multi-path channel, calculates an estimated sampling clock error rate on the basis of a phase rotation variation between pilot symbols, and outputs the calculated result.
机译:用于OFDM接收器的时钟错误检测设备和方法稳定地建立采样时钟恢复操作,而不受信道的影响。时钟误差检测设备从FFT单元的输出信号中提取导频符号,去除由多径信道引起的接收符号的相位失真,基于导频符号之间的相位旋转变化来计算估计的采样时钟误差率,并输出计算结果。

著录项

  • 公开/公告号WO2004042974A1

    专利类型

  • 公开/公告日2004-05-21

    原文格式PDF

  • 申请/专利权人 OPEN SOLUTION CO. LTD;AHN KYUNG-JOON;

    申请/专利号WO2003KR02371

  • 发明设计人 AHN KYUNG-JOON;

    申请日2003-11-06

  • 分类号H04J11/00;

  • 国家 WO

  • 入库时间 2022-08-21 22:56:27

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