首页> 外国专利> METHOD FOR DESIGNING A PATTERN OF AN INTEGRATED CIRCUIT, A METHOD FOR FORMING AN EXPOSURE MASK, AN EXPOSURE MASK, AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT DEVICE, CONCERNED WITH IMPROVING THE YIELD OF A WAFER OR A MASK IN A LITHOGRAPHY PROCESS

METHOD FOR DESIGNING A PATTERN OF AN INTEGRATED CIRCUIT, A METHOD FOR FORMING AN EXPOSURE MASK, AN EXPOSURE MASK, AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT DEVICE, CONCERNED WITH IMPROVING THE YIELD OF A WAFER OR A MASK IN A LITHOGRAPHY PROCESS

机译:设计整体电路图案的方法,形成曝光掩模的方法,曝光掩模以及制造整体电路装置的方法,其中涉及在光刻工艺中改善晶片或掩模的产量

摘要

PURPOSE: A method for designing a pattern of an integrated circuit, a method for forming an exposure mask, an exposure mask, and a method for manufacturing an integrated circuit device are provided to form a circuit pattern efficiently by transferring a proper mask pattern. CONSTITUTION: A tolerance(1) of a lithography process on a substrate to be processed is calculated considering a specification value of an exposure mask used for transferring a circuit pattern. The tolerance is calculated with respect to at least partial data(2) of a first design data for designing the circuit pattern of an integrated circuit. The calculated tolerance of the lithography process and a tolerance of a lithography process actually required on the substrate to be processed are compared. When the calculated tolerance of lithography process is determined to be smaller than the actually required tolerance of lithography process, the partial data is revised. The first design data is revised by using the revised partial data.
机译:目的:提供一种用于设计集成电路的图案的方法,一种用于形成曝光掩模的方法,一种曝光掩模以及一种用于制造集成电路器件的方法,以通过转印适当的掩模图案来有效地形成电路图案。组成:要处理的基板上的光刻工艺的容差(1)要考虑用于转移电路图案的曝光掩模的规格值。相对于用于设计集成电路的电路图案的第一设计数据的至少部分数据(2)计算公差。比较所计算的光刻工艺的公差和要在待处理的基板上实际需要的光刻工艺的公差。当确定所计算的光刻工艺的公差小于实际所需的光刻工艺的公差时,修改部分数据。通过使用修改后的部分数据来修改第一设计数据。

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