DISPLAY APPARATUS DRIVING CIRCUIT HAVING CASCADE CONNECTED PLURALITY OF DRIVER ICS, ESPECIALLY PREVENTING TIMING MISMATCH

摘要

PURPOSE: A display apparatus driving circuit having a plurality of cascade connected driver ICs is provided to prevent a timing mis-match of signals supplied to a driver IC by providing synchronous delay circuits. CONSTITUTION: A display apparatus driving circuit has a phase adjustment circuit(201) provided in a driver for driving a display apparatus based on inputted clock and data. The phase adjustment circuit includes a first synchronous delay circuit(301), a second synchronous delay circuit(302), a first holding circuit(305), and a second holding circuit(309). The first synchronous delay circuit adjusts a duty of the inputted clock and outputs it as a first clock. The second synchronous delay circuit delays the adjusted clock by a predetermined delay amount and outputs it as a second clock. The first holding circuit holds and outputs the data in response to the first clock. The second holding circuit holds and outputs the outputted data from the first holding circuit in response to the second clock.