首页> 外国专利> METHOD FOR FABRICATING ETCHING MASK OF SEMICONDUCTOR STRUCTURE WITH TRENCH CAPACITOR AND ETCHING MASK FABRICATED THEREBY TO VARY DIMENSION OF SIDE SURFACE OF ACTIVE REGION

METHOD FOR FABRICATING ETCHING MASK OF SEMICONDUCTOR STRUCTURE WITH TRENCH CAPACITOR AND ETCHING MASK FABRICATED THEREBY TO VARY DIMENSION OF SIDE SURFACE OF ACTIVE REGION

机译:用沟槽电容器制造半导体结构的蚀刻面膜的方法以及由此制造的蚀刻面膜随活动区域侧面尺寸的变化的方法

摘要

PURPOSE: A method for fabricating an etching mask of a semiconductor structure with a trench capacitor is provided to vary the dimension of the side surface of an active region without a profile of a hard mask by an etching technique. CONSTITUTION: The third hard mask layer(80) is thinner than the first and second hard mask layers(60,70). The first, second and third hard mask layers are formed on a micro structure. A photoresist mask(100) is formed on the third hard mask layer. The third hard mask layer is patterned by using the photoresist mask and etching chemicals. While the photoresist mask is eliminated, the second hard mask layer is patterned by using the third hard mask layer and etching chemicals. While the third hard mask layer is removed, the first hard mask layer is patterned by using the second hard mask layer and etching chemicals. The patterned second hard mask layer is eliminated.
机译:目的:提供一种用于制造具有沟槽电容器的半导体结构的蚀刻掩模的方法,以通过蚀刻技术来改变有源区域的侧面的尺寸而没有硬掩模的轮廓。组成:第三硬掩模层(80)比第一和第二硬掩模层(60,70)薄。第一,第二和第三硬掩模层形成在微结构上。在第三硬掩模层上形成光刻胶掩模(100)。通过使用光致抗蚀剂掩模和蚀刻化学品来图案化第三硬掩模层。在去除光致抗蚀剂掩模的同时,通过使用第三硬掩模层和蚀刻化学品来图案化第二硬掩模层。在去除第三硬掩模层的同时,通过使用第二硬掩模层和蚀刻化学品来图案化第一硬掩模层。去除了图案化的第二硬掩模层。

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