Semiconductor Circuit System Method for Testing Semiconductor Intergrated Circuits and Method for Generating a Test Sequence for Testing Thereof

摘要

An object of the present invention is to provide a semiconductor circuit system capable of discriminating between a failure inside a logic circuit and a failure outside a logic circuit in an MT-CMOS semiconductor integrated circuit, an inspection method for a semiconductor integrated circuit, and a method for generating the inspection sequence.;Logic blocks 7a to 7x are disposed between the power supply terminal 10 and the ground terminal 11. [ Logic circuits 5a to 5x each having a low threshold value transistor are provided in each of the logic blocks 7a to 7x and a logic circuit 5a to 5x is provided between the logic circuit 5a to 5x and the power supply terminal 10 and the ground terminal 11, The threshold voltage transistors pHVth-Tr (1a to 1x) and nHVth-Tr (2a to 2x) are arranged. When receiving the inspection signal Sdt for inspecting the external wiring of the logic circuit or the HVth-Tr, the state control unit 6 controls each HVth-Tr to be in the off state, and the current between the terminals 10 and 11 Measurement can detect defective products due to faulty operation of HVth-Tr or wiring short-circuit.