首页> 外国专利> COMBINATION 16/32 PARA AND TRACK, AND A SOCKET GUIDE, SPECIALLY CONCERNED WITH REMARKABLY REDUCING A REPLACING WORK TIME BY REPLACING A TEST BOARD ONLY IN A TEST UNIT EVEN THOUGH THE SIZE OF A SEMICONDUCTOR CHIP PACKAGE IS CHANGED DURING A TEST

COMBINATION 16/32 PARA AND TRACK, AND A SOCKET GUIDE, SPECIALLY CONCERNED WITH REMARKABLY REDUCING A REPLACING WORK TIME BY REPLACING A TEST BOARD ONLY IN A TEST UNIT EVEN THOUGH THE SIZE OF A SEMICONDUCTOR CHIP PACKAGE IS CHANGED DURING A TEST

机译:16/32组合的PARA和TRACK,以及一个插座指南,特别考虑到仅在测试单元中更换测试板即可显着减少更换工作时间,即使在测试过程中改变了半导体芯片包装的大小

摘要

PURPOSE: A combination 16/32 para and track, and a socket guide are provided to enable a track of a test unit to receive various sizes of semiconductor chip packages, thereby reducing a replacing work time of the test unit and preventing the semiconductor chip packages from horizontally moving in mounting portions of the track. CONSTITUTION: A combination 16/32 para and track(150) consists of a lower rail(156) and an upper rail(154) for transferring semiconductor chip packages(105). 4 mounting portions(157) where the semiconductor chip packages(105) are mounted exist on the one track(150). Stopper pins(158) for arraying the semiconductor chip packages(105) in the mounting portions(157) are fixed in one position. Carriers(160) are formed to prevent the semiconductor chip packages(105) from horizontally moving by a collision with the stopper pins(158) when the freely dropping semiconductor chip packages(105) are mounted in the mounting portions(157).
机译:用途:提供组合的16/32 Para和Track以及一个插座导轨,以使测试单元的轨道能够容纳各种尺寸的半导体芯片封装,从而减少了测试单元的更换工作时间并防止了半导体芯片封装不能在轨道的安装部分中水平移动。组成:组合的16/32杆和轨道(150)由下导轨(156)和上导轨(154)组成,用于转移半导体芯片封装(105)。在一个轨道(150)上存在安装有半导体芯片封装(105)的四个安装部分(157)。用于将半导体芯片封装(105)排列在安装部分(157)中的止动销(158)固定在一个位置。形成载体(160)以当自由下落的半导体芯片封装(105)被安装在安装部分(157)中时,防止半导体芯片封装(105)通过与止动销(158)的碰撞而水平移动。

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