首页> 外国专利> Non-linear distortion reduction device for amplifier stage has amplifier output combined via adder with error signal obtained by combining delayed input signal with amplifier output signal

Non-linear distortion reduction device for amplifier stage has amplifier output combined via adder with error signal obtained by combining delayed input signal with amplifier output signal

机译:用于放大器级的非线性失真减小装置,其具有通过加法器组合的放大器输出和通过延迟输入信号与放大器输出信号组合而获得的误差信号。

摘要

The distortion reduction device has an error signal generated by combining a delayed amplifier stage input signal with the output signal of an amplifier (V1) exhibiting the non-linear distortion and supplied to an adder (AD1) for summation with the amplifier output signal to provide an output signal (u5) with a reduced distortion component, supplied to the output of the amplifier stage (VS). The error signal is provided by a device having at least one transmission element (H31,H32) with a negative group delay time and an amplifier (V21,V22) with a positive group delay time.
机译:失真减小装置具有误差信号,该误差信号是通过将延迟的放大器级输入信号与表现出非线性失真的放大器(V1)的输出信号相组合而产生的,并提供给加法器(AD1)以与放大器输出信号求和以提供误差信号。具有减小的失真分量的输出信号(u5)被提供给放大器级(VS)的输出。由具有至少一个具有负的组延迟时间的传输元件(H31,H32)和具有正的组延迟时间的放大器(V21,V22)的装置提供该误差信号。

著录项

  • 公开/公告号DE10211537C1

    专利类型

  • 公开/公告日2003-11-27

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE2002111537

  • 发明设计人 SPLETT ARMIN;JELONNEK BJOERN;

    申请日2002-03-15

  • 分类号H03F1/32;

  • 国家 DE

  • 入库时间 2022-08-21 22:44:16

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