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Two-capacitor apparatus in or on a substrate where the outer capacitor partially encloses the inner capacitor useful in computer and semiconductor technology, e.g. for dynamic random access memory (DRAM) components
Two-capacitor apparatus in or on a substrate where the outer capacitor partially encloses the inner capacitor useful in computer and semiconductor technology, e.g. for dynamic random access memory (DRAM) components
An arrangement of at least two capacitors (14,15) in or on a substrate (2), where outer capacitor (14) at least partially encloses inner capacitor (15). An independent claim is included for a process of preparing the arrangement in which a trough (16) is introduced into prepared substrate (2), a first dielectric layer (17) is formed on the trough wall, a first electrode layer (18) is applied to layer (17), a second dielectric layer (20) to layer (18), and contact layers and further dielectric and electrode layers are then applied.
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