Multiplex filter assembly as integrated circuit (IC) e.g. multiple in single out (MISO) circuit block with input for supply of several signals, whose number is more than zero, conducted in time division multiplex sequentially through block

摘要

Several signals (n) are supplied via an input (1) and a multiplexer (2) bundles the signals in a serial, timed manner. A memory (5) stores output signal (9) of filter (3) at the end of input signal filtering period. It delivers stored filter output signal at start of new filter period of the same input signal to be written into filter.A filtered, bundled signal (10) is available at output (6). Pref. the filter is of K-order, or contains (K) filter stages, and has ohmic and/or capacitive elements. Independent claims are included for multiplex filtering process.