Output buffer register for electronic system, has two registers with data and update signal inputs, outputs coupled to respective multiplexer inputs, third register with input and output coupled to output and input of multiplexer

摘要

The buffer register (42) has a trigger register (431) with a data input, and an output connected to an input of a multiplexer (434). Data input and output of a register (432) are connected to output (434c) and input (434b), respectively. An input of a register (433) receives an update signal and an output (433b) is connected to a selection input (434d). All the registers receive a clock signal at the same time. Independent claims are also included for the following: (a) an output data delivering method through the output buffer register (b) an electronic system.