High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption

• 1. 最大后验概率(MAP)解码器的管线架构 [P] . 中国专利： CN1941637A . 2007-04-04
• 2. 最大后验概率(MAP)解码器的管线架构 [P] . 中国专利： CN1554072A . 2004-12-08
• 3. Improved high-speed "maximum a posteriori"(MAP) architecture with optimized memory size and power consumption [P] . 欧洲知识产权局专利： EP1276242B1 . 2006-02-01

  机译： 改进的高速“最大后验”（MAP）架构，具有优化的内存大小和功耗

• 4. Improved high-speed "maximum a posteriori"(MAP) architecture with optimized memory size and power consumption [P] . 欧洲知识产权局专利： EP1276242A1 . 2003-01-15

  机译： 改进的高速“最大后验”（MAP）架构，具有优化的内存大小和功耗

• 5. HIGH-SPEED "MAXIMUM A POSTERIORI" (MAP) ARCHITECTURE WITH OPTIMIZED MEMORY SIZE AND POWER CONSUMPTION [P] . 世界知识产权组织专利： WO0171924A3 . 2002-01-31

  机译： 优化的内存大小和功耗的高速“最大后积”（MAP）体系结构

• 1. Research on optimization of virtual machine memory access based on NUMA architecture [J] . He Mujun, Zheng Linjiang, Yang Kai, 高技术通讯（英文版） . 2021,第004期
• 2. LOW-POWER SURVIVOR MEMORY ARCHITECTURE FOR DFSE IN 1000BASE-T TRANSCEIVER [J] . Qiu Bingsen 电子科学学刊（英文版） . 2014,第002期
• 3. Power Consumption Optimization for 3D Graphics Rendering [J] . Lidong Xing, Tao Li, Hucai Huang, 哈尔滨工业大学学报（英文版） . 2019,第001期
• 4. A high-speed MAP architecture with optimized memory size and power consumption [C] . Worm, A., Lamm, . 2000
• 5. Software and hardware approaches to optimize memory power consumption and performance [D] . Yue, Jianhui 2012
• 6. A Novel Gibbs Maximum A Posteriori (GMAP) Approach on Bayesian Nonlinear Mixed-Effects Population Pharmacokinetics (PK) Models [O] . Seongho Kim, Stephen D. Hall, Lang Li -1
• 7. A high-speed MAP architecture with optimized memory size and power consumption [O] . Er Worm, Holger Lamm, Norbert Wehn 2000
• 8. Batch Maximum Likelihood (ML) and Maximum A Posteriori (MAP) Estimation with Process Noise for Tracking Applications [R] . Poore, A. B. , Slocumb, B. J. , Suchomel, B. J. , 2003

• 1. High-Speed,High-Power Motor Design for a Four-Legged Robot Actuator Optimized using the Weighted Sum and Response Surface Methods [J] . Tae-Woo Lee ,Do-Kwan Hong ,Tae-Uk Jung . 中国电工技术学会电机与系统学报(英文) . 2021,第3期
• 2. An Application of the Maximum Theorem in Multi-Criteria Optimization, Properties of Pareto-Retract Mappings, and the Structure of Pareto Sets [J] . Zdravko Dimitrov Slavov ,Christina Slavova Evans . 应用数学（英文） . 2012,第10期
• 3. 最大后验边缘概率与MAP结合的运动目标检测算法 [C] . 令狐永芳 ,何谟义 ,王士同 . 中国计算机学会CCF外围设备专业委员会2006年学术年会 . 2006
• 4. 基于FPGA的高速低功耗卡尔曼滤波器的架构设计和实现 [A] . 戴彬彬 . 2018