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METHOD FOR EXTRACTING CIRCUIT PARAMETER, AND METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT

机译:提取电路参数的方法,以及设计半导体集成电路的方法和装置

摘要

PROBLEM TO BE SOLVED: To enable a calculation on a finished width of highly precise wiring and a highly precise circuit simulation.;SOLUTION: This method comprises a step (102) of preparing correlation data 101 on a distance between model wiring and wiring on the same layer existing in the circumference of the model wiring, and a difference between a mask layout width of the model wiring and the finished width, and extracting a wire length and wiring width of analyzing wiring, and a distance between the analyzing wiring and wiring existing in the circumference on the same layer as the analyzing wiring, from an actual layout 100; and a step (105) of calculating wiring resistance and wiring capacity values using the finished width of the wiring obtained by referring the correlation data to a layout wiring width of the analyzing wiring, and a distance between the analyzing wiring similarly extracted and the wiring existing in the circumference of the analyzing wiring.;COPYRIGHT: (C)2006,JPO&NCIPI
机译:解决的问题:为了能够进行高精度布线的最终宽度的计算和高精度电路仿真。解决方案:该方法包括步骤(102),该步骤(102)准备关于模型布线与布线上的布线之间的距离的相关数据101。在模型布线的圆周上存在相同的层,并且模型布线的掩模布局宽度与最终宽度之间的差,并提取布线长度和分析布线的布线宽度,以及分析布线与存在的布线之间的距离从实际布局100开始,在与分析布线相同的层的圆周上;步骤(105),使用将相关数据参照分析用布线的布图布线宽度而得到的布线的最终宽度,以及同样提取的分析用布线与存在的布线之间的距离,计算布线电阻和布线容量值。在分析配线的周围。版权所有:(C)2006,JPO&NCIPI

著录项

  • 公开/公告号JP2005294852A

    专利类型

  • 公开/公告日2005-10-20

    原文格式PDF

  • 申请/专利权人 MATSUSHITA ELECTRIC IND CO LTD;

    申请/专利号JP20050116149

  • 发明设计人 ISHIKURA SATOSHI;

    申请日2005-04-13

  • 分类号H01L21/82;G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-21 22:37:04

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