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STANDARD CELL LAYOUT, STANDARD CELL LIBRARY, SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS DESIGN METHOD
STANDARD CELL LAYOUT, STANDARD CELL LIBRARY, SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS DESIGN METHOD
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机译:标准单元布局,标准单元库,半导体集成电路及其设计方法
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摘要
PROBLEM TO BE SOLVED: To provide a standard cell layout capable of suppressing the leak current without changing the existing processes, a standard cell library thereof, a semiconductor integrated circuit using the standard cell layout and its design method.;SOLUTION: This standard cell layout, which is used to design a semiconductor integrated circuit and is provided with one or more MOS transistors as logical cells, is included in a standard cell library and is provided with a domain for arranging an extended poly between a gate poly 11 constituting a gate electrode of the above-mentioned MOS transistor(s)and an adjacent contact 12.;COPYRIGHT: (C)2005,JPO&NCIPI
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