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JITTER MEASURING METHOD, JITTER MEASURING CIRCUIT AND OSCILLATION CIRCUIT EQUIPPED WITH IT

机译:抖动测量方法,抖动测量电路及配备该抖动测量电路的振荡电路

摘要

PROBLEM TO BE SOLVED: To provide a method for facilitating jitter measurement of an oscillation circuit assembled in a semiconductor integrated circuit.;SOLUTION: A DLL circuit 10 is constituted of a VCDL11 outputting a delay output Sout1 in which signal to be measured Sin is delayed for one period, a phase comparator 12 for phase-comparing between the signal to be measured Sin and the delayed output Sout1, a charge pump 13 for converting the output of the phase comparator 12 to the current signal of a pulse width corresponding to the phase difference, and a low-pass filter for gaining the output of the charge pump 13 as the input and controlling the delayed time of VCDL11 in accordance with the output. In a state that the DLL circuit 10 is locked, the output of the phase comparator 12 is converted to a pulse width current signal according to the phase difference by the charge pump 21 and is integrated with an integration circuit 22. The integrated output Sinteg is made a value corresponding to the jitter and when this is over a reference voltage Vref, the jitter is judged to have exceeded an allowance range.;COPYRIGHT: (C)2005,JPO&NCIPI
机译:解决的问题:提供一种便于对组装在半导体集成电路中的振荡电路进行抖动测量的方法;解决方案:DLL电路10由VCDL11构成,该VCDL11输出延迟输出Sout1,其中待测信号Sin被延迟。在一个周期内,一个相位比较器12用于在被测信号Sin和延迟输出Sout1之间进行相位比较,电荷泵13用于将相位比较器12的输出转换成与该相位相对应的脉冲宽度的电流信号差;以及一个低通滤波器,用于获得电荷泵13的输出作为输入,并根据该输出控制VCDL11的延迟时间。在DLL电路10被锁定的状态下,通过电荷泵21将相位比较器12的输出根据相位差转换为脉冲宽度电流信号,并且与积分电路22积分。积分输出Sinteg为设定一个与抖动相对应的值,当该值超过参考电压Vref时,就判断该抖动已超出允许范围。;版权:(C)2005,JPO&NCIPI

著录项

  • 公开/公告号JP2005049233A

    专利类型

  • 公开/公告日2005-02-24

    原文格式PDF

  • 申请/专利权人 SEIKO EPSON CORP;

    申请/专利号JP20030281914

  • 发明设计人 GOTO KENJI;

    申请日2003-07-29

  • 分类号G01R29/02;H01L21/822;H01L27/04;H03L7/081;H03L7/095;

  • 国家 JP

  • 入库时间 2022-08-21 22:31:25

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