Interrupt system an efficient system-on-chip design for

摘要

A method and system for managing an interrupt request ("interrupt"), The invention relates to process the interrupt, and can support multi-bus design more efficient and more simple in system-on-chip design be provided to facilitate the design of the integrated circuit and flexibility, there is for the assignment of interrupts to the processor, and be able to communicate between processors, and methods interrupt management system for. For managing interrupts in a system-on-chip design containing (100n, 100a, 100b, ...) a plurality of processors coupled to the (120m, 120a, 120b, ...) peripheral devices A plurality of System and method (400) (10). (110n 110a, 110b, ...,) the interrupt controller a plurality of interconnected, is coupled between the processor and peripheral devices. Interrupts generated by the peripheral device is received by the interrupt controller of all. In one embodiment, interrupt controller, is paired with the processor. Each interrupt controller can identify whether passed to the processor of its own which interrupt. Interrupt controller operates in cooperation in order to pass to a particular processor each interrupt. [Selection] Figure Figure 1