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System and method for designing a circuit wherein a single timing analysis ensures adequate performance in multiple applications

机译:用于设计电路的系统和方法,其中单个时序分析可确保在多种应用中具有足够的性能

摘要

A disclosed method for designing a circuit having multiple conductors includes selecting first and second circuit operating points corresponding to first and second circuit applications, respectively. A performance difference between circuit operation at the first and second circuit operating points is determined and used to compute a factor. The factor is applied to resistance values of the conductors, thereby producing modified conductor resistance values. A timing analysis of the circuit is performed using the modified conductor resistance values. A computer program product is described including computer program code for carrying out some or all of the operations of the method. An apparatus for designing the circuit includes means for applying the factor to the resistance values of the conductors and for performing the timing analysis of the circuit. A described timing analysis system includes a memory system and a central processing unit coupled to the memory system.
机译:用于设计具有多个导体的电路的公开方法包括分别选择与第一和第二电路应用相对应的第一和第二电路工作点。确定在第一和第二电路工作点处的电路工作之间的性能差异,并将其用于计算因子。该因数被应用于导体的电阻值,从而产生修改后的导体电阻值。使用修改后的导体电阻值对电路进行时序分析。描述了一种计算机程序产品,包括用于执行该方法的一些或全部操作的计算机程序代码。一种用于设计电路的设备,包括用于将所述因数应用于导体的电阻值并且用于执行电路的时序分析的装置。所描述的时序分析系统包括存储系统和耦合到该存储系统的中央处理单元。

著录项

  • 公开/公告号US2005015737A1

    专利类型

  • 公开/公告日2005-01-20

    原文格式PDF

  • 申请/专利权人 HUAJUN WEN;

    申请/专利号US20030621907

  • 发明设计人 HUAJUN WEN;

    申请日2003-07-17

  • 分类号G06F9/45;

  • 国家 US

  • 入库时间 2022-08-21 22:24:38

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