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Word line enable timing determination circuit of a memory device and methods of determining word line enable timing in the memory device
Word line enable timing determination circuit of a memory device and methods of determining word line enable timing in the memory device
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机译:存储设备的字线使能定时确定电路和确定存储设备中的字线使能定时的方法
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摘要
A word line enable timing determination circuit of a memory device and method of determining word line enable timing in a memory device may be configured to adjust enable timing at which to activate a word line for at least one read/write command input to the memory device. This may be based on whether the memory device is performing a hidden refresh operation. In an example, and when a read/write command is input to the memory device, a word line for the read/write command may be activated after a first delay if the memory device is not executing a hidden refresh operation. Otherwise, a word line for the read/write command is activated after a second delay.
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