首页> 外国专利> METHOD FOR OPTIMIZING ECU PARALLEL FLASH PROGRAMMING ARRANGEMENT ON A CAN-BASED VEHICLE SERIAL BUS IN GENERAL ASSEMBLY

METHOD FOR OPTIMIZING ECU PARALLEL FLASH PROGRAMMING ARRANGEMENT ON A CAN-BASED VEHICLE SERIAL BUS IN GENERAL ASSEMBLY

机译:通用组件中基于CAN的车辆串行总线上ECU并行闪存编程安排的优化方法

摘要

A parallel flash programming system for use in motor vehicle assembly includes an input receptive of information relating to a predetermined number of processors connected to a system bus, processor flash programming attributes, and system bus attributes. An incremental flash programming times determination module is adapted, based on the information, to determine incremental flash programming times of a processor in relation to multiple interframe wait times respective of multiple parallel flash programming schema in accordance with the predetermined number of processors. A global flash programming time resolution module is adapted to determine, based on incremental flash programming times respective of multiple processors of the predetermined number, an assignment of the multiple processors to a number of parallel programming tracks yielding a global flash programming time in accordance with predetermined criteria.
机译:用于机动车辆组装中的并行闪存编程系统包括接收与与连接到系统总线的预定数量的处理器有关的信息,处理器闪存编程属性和系统总线属性有关的输入。基于该信息,增量闪存编程时间确定模块适于根据预定数量的处理器来确定与多个并行闪存编程方案各自的多个帧间等待时间相关的处理器的增量闪存编程时间。全局闪存编程时间解析模块适于基于预定数量的多个处理器各自的增量闪存编程时间来确定多个处理器对多个并行编程轨道的分配,从而根据预定的数量来生成全局闪存编程时间标准。

著录项

  • 公开/公告号US2005090906A1

    专利类型

  • 公开/公告日2005-04-28

    原文格式PDF

  • 申请/专利权人 JIANYING SHI;CHARLES H. ROSA;

    申请/专利号US20030692239

  • 发明设计人 CHARLES H. ROSA;JIANYING SHI;

    申请日2003-10-23

  • 分类号G06F13/00;

  • 国家 US

  • 入库时间 2022-08-21 22:22:43

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