首页> 外国专利> Mean power frequency discriminator, frequency phase locked loop circuit and digital television demodulator using the same

Mean power frequency discriminator, frequency phase locked loop circuit and digital television demodulator using the same

机译:平均功率鉴频器,频率锁相环电路和使用该鉴频器的数字电视解调器

摘要

Exemplary embodiments of the present invention provide a frequency phase locked loop circuit, which may enable a frequency and/or phase of a sampled signal to be tracked within a short time. Exemplary embodiments of the present invention also provide a digital television demodulator, which may use the frequency phase locked loop circuit. Exemplary embodiments of the frequency phase locked loop circuit may include a mean power frequency discriminator, a mean calculator, a phase discriminator, a loop-filter, and an adder. The frequency phase locked loop circuit may obtain a carrier frequency through a path and may track a phase of the carrier frequency through another path.
机译:本发明的示例性实施例提供了一种频率锁相环电路,该电路可以使得能够在短时间内跟踪采样信号的频率和/或相位。本发明的示例性实施例还提供一种数字电视解调器,其可以使用频率锁相环电路。频率锁相环电路的示例性实施例可以包括平均功率鉴频器,均值计算器,鉴相器,环路滤波器和加法器。频率锁相环电路可以通过一条路径获得载波频率,并且可以通过另一条路径跟踪载波频率的相位。

著录项

  • 公开/公告号US2005220241A1

    专利类型

  • 公开/公告日2005-10-06

    原文格式PDF

  • 申请/专利权人 JUNLING ZHANG;KI-DONG KANG;

    申请/专利号US20050053924

  • 发明设计人 JUNLING ZHANG;KI-DONG KANG;

    申请日2005-02-10

  • 分类号H03F1/14;

  • 国家 US

  • 入库时间 2022-08-21 22:22:23

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