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Input buffer with CMOS driver gate current control enabling selectable PCL, GTL, or PECL compatibility
Input buffer with CMOS driver gate current control enabling selectable PCL, GTL, or PECL compatibility
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机译:具有CMOS驱动器栅极电流控制的输入缓冲器,支持可选的PCL,GTL或PECL兼容性
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摘要
An input/output buffer is provided which can be used to make an integrated circuit selectively compatible with one of a number of interface types, such as PCI, GTL, PECL, ECL and SSTI. The input buffer portion includes a first pair of CMOS transistors for driving the output (OUT) between the VSS and VDD rails similar to CMOS logic. Switching circuitry includes transistors which drive gates of the CMOS transistors to set the output (OUT) with a current level and a voltage level depending on a desired output drive current and voltage.
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